The present application relates to power and High Frequency (RF) MOS-gated transistors, and more particularly to CMOS compatible MOSFET structure and fabrication.
Note that the points discussed below may reflect the hindsight gained from the disclosed inventions, and are not necessarily admitted to be prior art.
Power MOSFETs are widely used as switching devices in many electronic applications. In order to minimize conduction power loss it is desirable that power MOSFETs have low specific on-resistance (Rsp), which is defined as the product of the on-resistance of a device and its area. A schematic cross section of a conventional trench MOSFET is shown in FIG. 1. A drain metallization layer 102 underlies an n+ deep drain region 104. A more lightly doped drift layer (or shallow drain) 106 overlies the deep drain region 104, and lies beneath a p-type body region 108 and an insulated trench. A gate electrode 114, typically formed of polysilicon, is positioned within the trench, and surrounded by insulation 116 (typically silicon dioxide). A source region 110 adjoins the trench insulation 116, and overlies at least part of the body region 108. A p+ body contact region 112 adjoins the body region 108, shorting the body region 108 to the source 110. The upper surface of the body contact region 112 and the source region 110, in this example, constitutes an upper silicon surface which is contacted by source metallization 103. When the gate electrode 114 is charged, an inversion layer is formed at the interface between the trench insulation 116 and the body region 108, allowing majority carriers (electrons in this example) to flow from source 110 to drain 104.
A trench MOSFET provides a lower specific on-resistance Rsp as the cell pitch decreases, due to the high packing density or number of cells per unit area. Furthermore, to minimize switching losses it is desirable to have a switch with lower gate-source (Cgs) and gate-drain (Cgd) capacitances which are directly proportional to lower gate charge (Qg) and gate-drain charge (Qgd). Ideally, a power MOS transistor should have low charges Qg and Qgd, as well as a low specific on-resistance Rsp.
The use of permanent or fixed electrostatic charges has been demonstrated to fabricate devices such as depletion mode DMOS transistors and solar cells. Some high voltage devices have been disclosed that incorporate fixed or permanent positive charges (QF) that balance the charge of the silicon depletion layer, see for example published US application 2008/064518.